ESP32 Interrupt latency - its dismal

ESP32 Interrupt Latency

Thinking of a simple way of interfacing to my Amiga without using glue logic, I looked at the ESP32 as a candidate. 

The aim was to replace the realtime clock using an NTP one - one inside the ESP32. The Amiga has a 4bit address and a 4bit data bus for for clock connected directly to the CPU - so that was nice.

As the clock is directly on the bus, the speed of the ESP32 is critical - and more importantly - how quick can the ESP32 get an interrupt and store the address latch and then serve the data. 

RAM speeds are 150nS - so that was the target; for a modern 200Mhz dual core xtensa it should be no trouble.
 

 

A small program that toggles an IO pin at 1Hz and a second output being triggered within the ISR. All using the default ESP-IDF C and examples.

From the plots - The latency is HORRIBLE! 2.5uS is what it takes to register the interrupt. Even with fudge of the code setting the GPIO inside the ISR.

Yellow trace is 1Hz toggle - Blue trace is the output being triggered within the ISR

Conclusion -

Without heavy lifting of writing code in Assembler, the ESP32 cannot service interrupts quickly! 


** UPDATE **

Removed the ISR functions and replaced with a BUSY-WAIT loop.. looks alot better but no cigar -  but its a HUGE improvement!

 Total time changed to 424nS

**UPDATE**

I removed the C function gpio_get_level() and replaced with a direct register write

GPIO.out_w1ts = (1 << ISR_OUTPUT);

Down to 256nS for a trigger... better.. Now to shave 200nS off!